Publications
39. Park, J., Jeong, Y., Kim, J., Lee, S., Kwak, J.Y., Park, J.K. and Kim, I., 2022. High Dynamic Range Digital Neuron Core With Time-Embedded Floating-Point Arithmetic. IEEE Transactions on Circuits and Systems I: Regular Papers.
38. Kang, J., Kim, T., Hu, S., Kim, J., Kwak, J.Y., Park, J., Park, J.K., Kim, I., Lee, S., Kim, S. and Jeong, Y., 2022. Cluster-type analogue memristor by engineering redox dynamics for high-performance neuromorphic computing. Nature Communications, 13(1), p.4040.
37. Kim, M., Park, E., Park, J., Kim, J., Jeong, Y., Lee, S., Kim, I., Park, J.K., Park, S.Y. and Kwak, J.Y., 2022. A triple-level cell charge trap flash memory device with CVD-grown MoS2. Results in Physics, 38, p.105620.
36. Cho, J.M., Ko, Y.J., Lee, H.J., Choi, H.J., Baik, Y.J., Park, J.K., Kwak, J.Y., Kim, J., Park, J., Jeong, Y. and Kim, I., 2022. Bottom–Up Evolution of Diamond–Graphite Hybrid Two‐Dimensional Nanostructure: Underlying Picture and Electrochemical Activity. Small, 18(8), p.2105087.
35. Lee, H., Cho, S.W., Kim, S.J., Lee, J., Kim, K.S., Kim, I., Park, J.K., Kwak, J.Y., Kim, J., Park, J. and Jeong, Y., 2022. Three-terminal ovonic threshold switch (3T-OTS) with tunable threshold voltage for versatile artificial sensory neurons. Nano Letters, 22(2), pp.733-739.
34. Hu, S., Kang, J., Kim, T., Lee, S., Park, J.K., Kim, I., Kim, J., Kwak, J.Y., Park, J., Kim, G.T. and Choi, S., 2022. SPICE study of STDP characteristics in a drift and diffusive memristor-based synapse for neuromorphic computing. IEEE Access, 10, pp.6381-6392.
33. Park, E., Seo, J.E., Noh, G., Jo, Y., Woo, D.Y., Kim, I.S., Park, J., Kim, J., Jeong, Y., Lee, S. and Kim, I., 2022. A pentagonal 2D layered PdSe 2-based synaptic device with a graphene floating gate. Journal of Materials Chemistry C, 10(43), pp.16536-16545.
32. Lee, J., Cho, S.W., Lee, Y.W., Kwak, J.Y., Kim, J., Jeong, Y., Hwang, G.W., Park, S., Kim, S. and Lee, S., 2022. Rational engineering of a switching material for an Ovonic threshold switching (OTS) device with mitigated electroforming. Journal of Materials Chemistry C, 10(47), pp.18033-18039.
31. Shin, S., Kang, D.C., Kim, K., Jeong, Y., Kim, J., Lee, S., Kwak, J.Y., Park, J., Hwang, G.W., Lee, K.S. and Park, J.K., 2022. Emulating the short-term plasticity of a biological synapse with a ruthenium complex-based organic mixed ionic–electronic conductor. Materials Advances, 3(6), pp.2827-2837.
30. Jo, Y.; Mun, K.; Jeong, Y.; Kwak, J.-Y.; Park, J.; Lee, S.; Kim, I.; Park, J.-K.; Hwang, G.-W.; Kim, J. A Poisson Process Generator Based on Multiple Thermal Noise Amplifiers for Parallel Stochastic Simulation of Biochemical Reactions. Electronics 2022, 11, 1039.
29. Kim, M., Park, E., Kim, I.S., Park, J., Kim, J., Jeong, Y., Lee, S., Kim, I., Park, J.K., Seong, T.Y. and Kwak, J.Y., 2021. A Comparison Study on Multilayered Barrier Oxide Structure in Charge Trap Flash for Synaptic Operation. Crystals, 11(1), p.70.
28. Yang, S., Shin, J., Kim, T., Moon, K.W., Kim, J., Jang, G., Yang, J., Hwang, C., Jeong, Y. and Hong, J.P., 2021. Integrated neuromorphic computing networks by artificial spin synapses and spin neurons. NPG Asia Materials, 13(1), pp.1-10.
27. Lee, H.S., Hwang, G.W., Seong, T.Y., Park, J., Kim, J.W., Kim, W.M., Kim, I. and Lee, K.S., 2021. Design of mid-infrared filter array based on plasmonic metal nanodiscs array and its application to on-chip spectrometer. Scientific Reports, 11(1), pp.1-10.
26. Kim, T., Hu, S., Kim, J., Kwak, J.Y., Park, J., Lee, S., Kim, I., Park, J.K. and Jeong, Y., 2021. Spiking Neural Network (SNN) with memristor synapses having non-linear weight update. Frontiers in computational neuroscience, 15, p.22.
25. Kim, K., Kang, D.C., Jeong, Y., Kim, J., Lee, S., Kwak, J.Y., Park, J., Hwang, G.W., Lee, K.S., Ju, B.K. and Park, J.K., 2021. Ion beam-assisted solid phase epitaxy of SiGe and its application for analog memristors. Journal of Alloys and Compounds, 884, p.161086.
24. A. Kim, I. Kim, J. Y. Kwak, J. Park, Y. Jeong, S. Lee, J. K. Park and J. Kim, "A Basal Ganglia-inspired spiking neural network model for reinforcement learning", MLIS 2021.
23. E. Park, M. Kim, T.S. Kim, I.S. Kim, J. Park, J, Kim, Y. Jeong, S. Lee, I. Kim, J.K. Park, G.T. Kim J. Chang, K. Kang, J.Y. Kwak, "A 2D material-based floating gate device with linear synaptic weight update", Nanoscale 2020.
22. Kim, K., Park, S., Hu, S.M., Song, J., Lim, W., Jeong, Y., Kim, J., Lee, S., Kwak, J.Y., Park, J. Park, J.K. Ju, B.K, Jeong, D.S., "Enhanced analog synaptic behavior of SiN x/a-Si bilayer memristors through Ge implantation", NPG Asia Materials, 12(1), pp.1-13, 2020.
20. J. Teo, J. Kim, S. S. Woo and R. Sarpeshkar, "Bio-Molecular Circuit Design with Electronic Circuit Software and Cytomorphic Chips", IEEE Biomedical Circuits and Systems Conference (BioCAS), 16-19 Oct 2019
19. V. Kornijcuk, J. Kim, J.Y. Kwak, J. Park, and D.S. Jeong, “Memory-Centric Neuromorphic Processor Design,” The 26th Korean Conference on Semiconductors (KCS 2019), 13–15 Feb 2019
18. J. Zeng*, A. Banerjee*, J. Kim*, Y. Deng, T. W. Chapmen, R. Daniel, R. Sarpehskar, "A Novel Bioelectronic Reporter System in Living Cells Tested with a Synthetic Biological Comparator," Scientific Reports, 9, 7275, 2019 (* indicates equal contribution.)
17. G. Kim, V. Kornijcuk, D. Kim, I. Kim, J. Kim, H.C. Woo, J. Kim, C.S. Hwang and D.S. Jeong, "Markov chain Hebbian learning algorithm with ternary synaptic units," IEEE Access, 7, pp.10208-10223, 2019.
16. V. Kornijcuk, J. Park, G. Kim, D. Kim, I. Kim, J. Kim, J.Y. Kwak, and D.S. Jeong, "Reconfigurable Spike Routing Architectures for On‐Chip Local Learning in Neuromorphic Systems," Advanced Materials Technologies, 4(1), 2019.
15. J. Zeng, J. Teo, A. Banerjee, T.W. Chapman, J. Kim and R. Sarpeshkar, "A Synthetic Microbial Operational Amplifier," ACS synthetic biology, 7(9), pp.2007-2013, 2018.
14. J. Kim, S.S. Woo and R. Sarpeshkar, "Fast and Precise Emulation of Stochastic Biochemical Reactions with Amplified Thermal Noise in Silicon Chips,” IEEE Transactions on Biomedical Circuits and Systems (TBCAS), vol. 12, no. 2, pp. 379-389, 2018.
13. S.S. Woo, J. Kim and R. Sarpeshkar, “A Digitally Programmable Cytomorphic Chip for Simulation of Arbitrary Biochemical Reaction Networks,” IEEE Transactions on Biomedical Circuits and Systems (TBCAS), vol. 12, no. 2, pp. 360-378, 2018.
12. S.H. Cho, J. Kim, W. Yu, Y.G. Yoon, “Time-domain Analog-to-Digital Converters Using Voltage-Controlled Oscillators,” Springer Publishing Company, Incorporated, 2016
11. S.S. Woo, J. Kim and R. Sarpeshkar, “A Cytomorphic Chip for Quantitative Modeling of Fundamental Bio-Molecular Circuits,” IEEE Transactions on Biomedical Circuits and Systems (TBCAS), vol. 9, no. 4, pp. 527-542, 2015
10. W. Yu, J. Kim, K.S. Kim and S.H. Cho, "A Time-Domain High-Order MASH Delta-Sigma ADC using Voltage-Controlled Gated-Ring Oscillator," IEEE Transactions on Circuits and Systems (TCAS) –I, vol. 60, no. 4, pp. 856-866, 2013.
9. J. Kim, W. Yu, S.H. Cho, "A Digital-Intensive MMMB Receiver Using a Sinc2 filter-Embedded VCO-Based ADC," IEEE Transactions on Microwave Theory and Techniques (TMTT), vol. 60, no.10, pp.3254-3262, 2012.
8. T.K. Jang, J. Kim, Y.G. Yoon and S.H. Cho, “A Highly-Digital VCO-based Analog-to-Digital Converter using Phase Interpolator and Digital Calibration,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI) vol. 20, no. 8, pp. 1368-1372, 2012
7. J. Kim, W. Yu, H.K. Yu and S.H. Cho, “A Digital-Intensive Receiver Front-End Using VCO-based ADC with an Embedded Second-Order Anti-Aliasing Sinc Filter,” IEEE International Solid-State Circuits Conference (ISSCC), Feb 2011.
6. J. Kim, J. Lee and S.H. Cho, “Digital-Intensive Analog Circuits for Highly-Digitized RF Receivers,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2011.
5. J. Kim, Y.G. Yoon, T.K. Jang and S.H. Cho “Analysis and Design of Voltage Controlled Oscillator Based Analog-to-Digital Converter,” IEEE Transactions on Circuits and Systems–I, Vol. 57, No. 1, pp.18-30, Jan 2010. (Number of citations: 154)
4. J. Lee, J. Kim and S.H. Cho, “A 1.8 to 2.4GHz 20mW Digital-Intensive RF Sampling Receiver with a Noise-Cancelling Bandpass Low-Noise Amplifier in 90nm CMOS,” in IEEE Radio Frequency Integrated Circuits (RFIC), May 2010.
3. K.S. Kim, J. Kim and S.H. Cho, “Nth-order multi-bit delta-sigma ADC using SAR quantizer,” Electronics Letters, 2010.
2. Y.G. Yoon, J. Kim, T.K. Jang and S.H. Cho “A Time-based Bandpass ADC Using Time-Interleaved Voltage-Controlled Oscillators,” IEEE Transactions on Circuits and Systems–I, Vol. 55, No. 11, pp.3571-3581, Dec 2008. (Winner of the 2009 IEEE Transaction on Circuits and Systems GuilleminCauer Best paper Award)
1. J. Kim and S.H. Cho, “Time-Based Analog-to-Digital Converter Using Multiphase Voltage-Controlled Oscillator,” IEEE International Symposium on Circuits and Systems (ISCAS), May 2006
